Low voltage differential signaling (LVDS) interface systems, which may have high speed operation, lower current consumption and/or lower electromagnetic interference (EMI), are used in various applications, such as semiconductor memory devices, liquid crystal display devices, communication terminals, etc.
FIG. 1 is a circuit diagram illustrating a conventional low voltage differential signaling (LVDS) interface system 10.
Referring to FIG. 1, the LVDS interface system 10 includes a low voltage differential signaling (LVDS) driver 20 and a low voltage differential signaling (LVDS) receiver 30. The LVDS driver 20 is used to transmit a low voltage differential signal pair in response to a digital signal Vin1 and an inverted digital signal Vin2 to the LVDS receiver 30. The LVDS receiver 30 includes an external resistor RL that detects a voltage difference between the low voltage differential signal pair and a receiver unit 31 that restores the original digital signal Vin1 based on the detected voltage difference between the low voltage differential signal pair.
The LVDS driver 20 and the LVDS receiver 30 may be implemented as a chip and an external resistor RL may be disposed between the LVDS driver 20 and the LVDS receiver 30.
The LVDS driver 20 includes a current source 21 and four transistors M10, M20, M30 and M40. The current source 21 may provide a predetermined electric current, for example, about 3.5 mA.
When the digital signal Vin1 has a logic low level and the inverted digital signal Vin2 has a logic high level, a first transistor M10 and a fourth transistor M40 are turned on so that a current may flow through the external resistor RL in a first direction. Conversely, when the digital signal Vin1 has a logic high level and the inverted digital signal Vin2 has a logic low level, a second transistor M20 and a third transistor M30 are turned on so that a current may flow through the external resistor RL in a second direction that is opposite to the first direction.
Thus, the voltage difference between the low voltage differential signal pair may be detected across the external resistor RL. The current generated by the current source 21 is about 3.5 mA and the external resistor RL is 100Ω so that the voltage across the external resistor RL is about 3.5 mA×100Ω=350 mV.
As described above, the voltage difference between the low voltage differential signal pair is determined as the voltage across the external resistor RL disposed at a receiving end of the LVDS receiver 30 and has a voltage level of, for example, about 350 mV. Thus, the external resistor RL may be required in the conventional LVDS interface system 10.
In addition, the LVDS interface system 10 is often required to cover multiple channels, not only a single channel. In this circumstance, the LVDS interface system 10 may include as many external resistors RL as the number of the channels.
FIG. 2 is a circuit diagram illustrating a conventional low voltage differential signaling (LVDS) interface system 40 having n channels.
Referring to FIG. 2, the conventional LVDS interface system 40 includes low voltage signal drivers 41 D1 through Dn and low voltage signal receivers 45 E1 through En. A plurality of external resistors RL1 through RLn are disposed between the LVDS drivers D1 through Dn and the LVDS receivers E1 through En, respectively. Thus, n external resistors RL1 through RLn are included in the conventional LVDS interface system 40. In addition, as the number of channels is increased, the number of the external resistors that are disposed exterior to a chip is also increased.
Since the conventional LVDS interface system includes the external resistors, the conventional LVDS interface system has the following disadvantages.
First, since the external resistor is not integrated on a chip where the LVDS driver or the LVDS receiver is formed, a signal characteristic of the transmitted signal may be lowered due to the use of interconnections, etc. For instance, in a conventional LVDS system, a waveform applied to the LVDS receiver may be easily distorted, and a jitter characteristic may be deteriorated.
Second, as the number of channels is increased, the number of external resistors required is also increased. Therefore, installing the external resistors in the LVDS receiver may become difficult and/or the cost may be increased. This problem may become more serious as the number of channels employed is increased.
Third, as the external resistor has a fixed resistance value, the external resistor for each channel may need to be replaced with a new external resistor having a desired resistance value in order to change the resistance value.
As described above, the conventional LVDS interface system may have some disadvantages in that the performance of the LVDS interface system may be lowered due to the use of the external resistor, installation may become difficult, the cost may be increased and/or the resistance value of a receiving end may not be easily modified, etc. Those problems may become more serious as the number of channels employed is increased.